This update contains fixes and stability improvements.

This update contains fixes and stability improvements.

This update contains stability improvements and fixes a bug with the test days.

This update contains stability improvements. Furthermore, the app can be tested for 7 days without any restrictions. After the trial period has expired, the app has the following restriction: • Operation cannot be activated In-app purchases that have already been made can of course be restored.

This update • prevents the incorrect error message “A problematic connecting line was found” that may occur in edit mode • fixes a bug with marked lines.

This update fixes the error that occurs in continuous clock mode for clock pulses with a phase setting of 1:12.

This update adds the following to the operating mode • an option to specify a number of cycles that are executed as a cycle sequence using the continuous pulse button. If the number 0 is entered, normal continuous pulse mode is activated.  
• an option to adjust the clock frequency.

In this version • the display in the large 7-segment display with decoder is adapted to hexadecimal coding (0000 → 0, 1001 → 9, 1010 → A, 1111 → F). So that leading zeros can be hidden, the display is provided with an activation input A (top right). When loading a circuit with the previous version, the activation input is automatically added. • A frequency for the clock pulses can be selected in the “Clock generator” menu.

This update fixes a bug that causes the program to abort in the IC view in the “Edit” menu.

This update fixes a display error in the IC interior view. Due to a programming error when hiding dummy leads (see version 7.0), some short leads that lead to component connections are not displayed in the internal view of ICs. As this is only a display problem, it has no effect on the function of the ICs.

This update fixes a display error in the LED matrix and contains further stability improvements.

This update • contains stability improvement • adds an LED matrix and an enlarged seven-segment display with integrated decoder to the block elements. This ensures the exchange of circuits between the macOS and iOS versions.

This update • fixes the error in positioning a cutout copy when it is placed too close to the right or bottom edge of the workspace • adds the markings in the JK-MS flip-flop that are missing in dark mode • prevents multiple opening of element windows (e.g. when changing the gate form), which became possible by replacing outdated methods in 7.2.2, and the programme abort that then occurs when closing. • fixes an error that can occur when resizing the windows for block elements and ICs • makes it possible to copy and paste individual components when editing circuits without existing connection lines, as would be the case with a cut-out • includes a diode as an additional component in the basic element window by popular request • positions the window with an error message so that the marked error location is visible in any case.

This update • fixes the error that occurs in dark mode in the IC view (white lines on a white background) • fixes a line error that occurs when copying and pasting cutouts in special positions • includes a more appealing colour combination for the dark mode

Unfortunately, an error has crept in during the improvements for editing cutouts in version 7.2, which allows the production of an IC only if an arbitrary cutout has been marked before. This version fixes the bug.

This update contains • some improvements for editing cut-outs • an adjustment of the colours for the dark mode

This update • improves the algorithm for automatic dragging of lines in connection with the basic element location options added in version 7.0. • eliminates the short line pieces for creating gaps (see version 7.0) from the IC internal circuit • allows zooming to the screen edges at all screen resolutions • allows copying and pasting of sections in multiple LoCAD instances

This update contains the following changes: • By popular request, the position options of the basic elements have been added, so that the outputs can now also be directed to the left and upwards. The desired position can be selected via the arrows in the second row. • When creating ICs, input lines without a connection to a component that are a maximum of 3 grid units long are not drawn as a connection at the IC edge but are entered as a gap in the row of connections.

This update fixes an error that occurs during IC manufacturing due to the automatic correction of circuits damaged by IC deletion added in version 6.4.

This update • fixes a problem that occurs when deleting nested ICs • now also considers the possibly existing negation points at IC inputs when
 initializing a circuit • shows the exact delay value in the signal delay window.

This update • prevents the possible wrong positioning of ICs with a very short click on the touchpad • fixes a bug when using negation points at IC outputs.

This update removes a minor ambiguity regarding connection designations when creating ICs.

This update fixes a bug regarding the language setting

This update contains some minor improvements.

This update • fixes the error that occurs under macOS Monterey when clicking "Single clock pulse" in the clock generator menu • speeds up the loading of complex circuits