VHDL Ref 4+

squishLogic

专为 iPad 设计

    • ¥22.00

简介

A quick reference manual for the two most popular Hardware Description Languages (HDL): VHDL and Verilog. This app is written by engineers, for engineers. For every construct in VHDL, provides the equivalent in Verilog, and vice-versa. Experienced custom digital logic designer for FPGA or ASIC? Electrical engineering student just learning the ropes? This app is for you.

+ Searchable dictionary of every keyword, operator, and data type for both languages.

+ Handbook provides simple example for every single reference

+ Common functions in each language

+ All pre-defined attributes for VHDL

+ All primitive gates and drive strengths for Verilog

+ Filter by language (VHDL, Verilog, or both)

+ Filter by language elements (keywords, operators, attributes, data types, etc.)

新内容

版本 2.1

Minor update for new iOS.

App 隐私

开发者“squishLogic”已表明该 App 的隐私规范可能包括了下述的数据处理方式。有关更多信息,请参阅开发者隐私政策

未收集数据

开发者不会从此 App 中收集任何数据。

隐私处理规范可能基于你使用的功能或你的年龄等因素而有所不同。了解更多

支持

  • 家人共享

    启用“家人共享”,即可让最多 6 个家庭成员使用此 App。

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