VHDL Ref 4+

squishLogic

專為 iPad 設計

    • HK$ 22.00

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描述

A quick reference manual for the two most popular Hardware Description Languages (HDL): VHDL and Verilog. This app is written by engineers, for engineers. For every construct in VHDL, provides the equivalent in Verilog, and vice-versa. Experienced custom digital logic designer for FPGA or ASIC? Electrical engineering student just learning the ropes? This app is for you.

+ Searchable dictionary of every keyword, operator, and data type for both languages.

+ Handbook provides simple example for every single reference

+ Common functions in each language

+ All pre-defined attributes for VHDL

+ All primitive gates and drive strengths for Verilog

+ Filter by language (VHDL, Verilog, or both)

+ Filter by language elements (keywords, operators, attributes, data types, etc.)

最新功能

版本 2.1

Minor update for new iOS.

App 私隱

開發者表明squishLogic的私隱慣例或包括下列資料的處理。詳情請參閱開發者的私隱政策

不收集資料

開發者不會從此 App 收集任何資料。

私隱慣例或因使用的功能或年齡等因素而異。進一步了解

支援

  • 家人共享

    啟用「家人共享」後,多達六位家庭成員可以使用此 App。

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