VHDL Ref 4+

Reference for VHDL and Verilog

squishLogic

Designed for iPad

    • ₱ 179.00

Screenshots

Description

A quick reference manual for the two most popular Hardware Description Languages (HDL): VHDL and Verilog. This app is written by engineers, for engineers. For every construct in VHDL, provides the equivalent in Verilog, and vice-versa. Experienced custom digital logic designer for FPGA or ASIC? Electrical engineering student just learning the ropes? This app is for you.

+ Searchable dictionary of every keyword, operator, and data type for both languages.

+ Handbook provides simple example for every single reference

+ Common functions in each language

+ All pre-defined attributes for VHDL

+ All primitive gates and drive strengths for Verilog

+ Filter by language (VHDL, Verilog, or both)

+ Filter by language elements (keywords, operators, attributes, data types, etc.)

What’s New

Version 2.1

Minor update for new iOS.

App Privacy

The developer, squishLogic, indicated that the app’s privacy practices may include handling of data as described below. For more information, see the developer’s privacy policy.

Data Not Collected

The developer does not collect any data from this app.

Privacy practices may vary based on, for example, the features you use or your age. Learn More

Supports

  • Family Sharing

    Up to six family members can use this app with Family Sharing enabled.

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