
VHDL Ref 4+
squishLogic
專為 iPad 設計
-
- $90.00
截圖
簡介
A quick reference manual for the two most popular Hardware Description Languages (HDL): VHDL and Verilog. This app is written by engineers, for engineers. For every construct in VHDL, provides the equivalent in Verilog, and vice-versa. Experienced custom digital logic designer for FPGA or ASIC? Electrical engineering student just learning the ropes? This app is for you.
+ Searchable dictionary of every keyword, operator, and data type for both languages.
+ Handbook provides simple example for every single reference
+ Common functions in each language
+ All pre-defined attributes for VHDL
+ All primitive gates and drive strengths for Verilog
+ Filter by language (VHDL, Verilog, or both)
+ Filter by language elements (keywords, operators, attributes, data types, etc.)
新內容
版本 2.1
Minor update for new iOS.
App 隱私權
開發者「squishLogic」指出 App 的隱私權實務可能包含下方描述的資料處理。如需更多資訊,請參閱開發者的隱私權政策。
不收集資料
開發者不會從這個 App 收集任何資料。
隱私權實務可能因你使用的功能或你的年齡等因素而有所不同。進一步瞭解
資訊
支援
-
家人共享
啟用「家人共享」,即可讓最多六名家庭成員使用此 App。